LiquidASIC™
LiquidASIC consists of pre-configured platform master slices with varying resources to accommodate the different needs of our customers; it features a wide range of programmability to simplify realization of ASIC and ASSP designs. This advanced ASIC platform uses a combination of metal-programmable LiquidIP, uniform structures, RBCPR and industry-standard EDA tools to deliver a high-performing ASIC design while reducing risk, cost and time-to-market.
LiquidASIC is the industry's best performing, flexible family of pre-defined ASIC platforms. LiquidASIC is enabling a new paradigm: true ASIC/COT performance, cost with scalable resources and shortest time to market.
LiquidASIC is the ultimate flexible platform to realize your SOC designs. It is a simple, low risk, silicon-proven method for going to market with significant benefits.
LiquidASIC is the industry's best performing, flexible family of pre-defined ASIC platforms. LiquidASIC is enabling a new paradigm: true ASIC/COT performance, cost with scalable resources and shortest time to market.
LiquidASIC is the ultimate flexible platform to realize your SOC designs. It is a simple, low risk, silicon-proven method for going to market with significant benefits.
Features
- High Logic Density - 1.9 to 76 million gates
- High memory density - 5 MB to 50 MB single/dual port memory and up to 5 Mbits multiport register files
- Flexible IO resources - 329 to 1084 IO resources
- Up to 32 SerDes lanes
- Speeds of up to 700 MHz
- ARM926EJ_S with and without cache
Benefits
- Low NRE and start-up costs
- Least time to market
- Scalable Resources
- Lower Power and High performance (up to 700 MHz)
Product Briefs
| Feature | Type | Product Brief | Data Sheet |
|---|---|---|---|
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| LiquidASIC 90nm | RB1010 & RB1020S Families |  Download |
Request Info |
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| LiquidASIC 65nm | RB2010 & RB2020S Families | Download |
Request Info |